B. Gorjiara, M. Reshadi, D. Gajski, "Chapter 13: GNR: A Formal Language for Specification, Compilation, and Synthesis of Custom Embedded Processors", N. Dutt, Processor Description Languages - Applications and Methodologies, Morgan Kaufmann, ISBN: 978-0-12-374287-2, June 2008. (Elsevier) (amazon)
B. Gorjiara, M. Reshadi, D. Gajski, "Chapter 2: Low-Power Design with NISC Technology", S. Parameswaran, Low-Power Application-Specific Processors, Springer, ISBN: 978-1-4020-5868-4, April 2007. (springer) (amazon)
B. Gorjiara, M. Reshadi, D. Gajski, "Merged Dictionary Code Compression for FPGA Implementation of Custom Microcoded PEs", ACM Transactions on Reconfigurable Technology and Systems (TReTS), 2008. (pdf)
M. Reshadi, B. Gorjiara, D. Gajski, "Cycle-Accurate Compilation Algorithm for Custom IP design using No-Instruction-Set-Computer (NISC) Technology", Submitted to IEEE Transactions on Very Large Scale Integrated Systems (TVLSI), 2007.
B. Gorjiara,
N. Bagherzadeh,
P. Chou,
"Ultra-Fast and Efficient Algorithm for Energy Optimization by Gradient-based Stochastic Voltage and Task Scheduling",
ACM Transactions on Design Automation of Electronic Systems (TODAES),
2007.
(pdf)
EECS Best Journal Paper Award
M. Reshadi, B. Gorjiara, N. Dutt, "Generic Processor Modeling for Automatically Generating Very Fast Cycle-Accurate Simulators", IEEE Transactions on Computer Aided Design (TCAD), Volume 25, Issue 12, pages 2904-2918, December 2006. (pdf) (ieee)
B. Gorjiara, D. Gajski, "Automatic Architecture Refinement Techniques for Customizing Processing Elements", Design Automation Conference (DAC), June 2008. (pdf)
M. Reshadi, B. Gorjiara, D. Gajski, "C-Based Design Flow: A Case Study on G.729A for Voice over Internet Protocol (VoIP)", Design Automation Conference (DAC), June 2008. (pdf)
B. Gorjiara, D. Gajski, "A Novel Profile-Driven Technique for Simultaneous Power and Code-size Optimization of Nanocoded IPs", International Conference on Computer Design (ICCD), October 2007. (pdf)
B. Gorjiara, D. Gajski, "FPGA-friendly Code Compression for Horizontal Microcoded Custom IPs", International Symposium on Field-Programmable Gate Arrays (FPGA), February 2007. (pdf)
B. Gorjiara, N. Bagherzadeh, P. Chou, "Integrating Power Management into Distributed Real-time Systems at Low Implementation Cost", Asia and South Pacific Design Automation Conference (ASPDAC), January 2007. (pdf)
B. Gorjiara, M. Reshadi, P. Chandraiah, D. Gajski, "Generic Netlist Representation for System and PE Level Design Exploration", International Symposium on Hardware/Software Codesign and System Synthesis (CODES+ISSS), October 2006. (pdf) (acm)
B. Gorjiara, M. Reshadi, D. Gajski, "Generic Architecture Description for Retargetable Compilation and Synthesis of Application-Specific Pipelined IPs", International Conference on Computer Design (ICCD), October 2006. (pdf)
J. Trajkovic, M. Reshadi, B. Gorjiara, D. Gajski, "A Graph Based Algorithm for Data Path Optimization in Custom Processors", Euromicro Conference on Digital System Design (DSD), September 2006. (pdf)
B. Gorjiara, M. Reshadi, D. Gajski, "Designing a Custom Architecture for DCT Using NISC Technology", Asia and South Pacific Design Automation Conference (ASPDAC), Design Contest, January 2006. (pdf) (Download DCTs code)
M. Reshadi, B. Gorjiara, D. Gajski, "Utilizing Horizontal and Vertical Parallelism Using a No-Instruction-Set Compiler and Custom Datapaths", International Conference on Computer Design (ICCD), pages 69-76, October 2005. (pdf) (ieee) (acm)
B. Gorjiara, D. Gajski, "Custom Processor Design Using NISC: A Case-Study on DCT algorithm", Workshop on Embedded Systems for Real-time Multimedia (ESTIMEDIA), September 2005. (pdf) (Download DCTs)
B. Gorjiara, N. Bagherzadeh, P. Chou, "An Efficient Voltage Scaling Algorithm for Complex SoCs with Few Number of Voltage Modes", International Symposium on Low Power Electronics and Design (ISLPED), 2004. (Web-based voltage scaling tool) (pdf) (slides)
B. Gorjiara, P. Chou, N. Bagherzadeh, D. Jensen, M. Reshadi, "Fast and Efficient Voltage Scheduling by Evolutionary Slack Distribution", Asia and South Pacific Design Automation Conference (ASPDAC), pages 659-662, January 2004. (pdf) (ieee) (acm)
B. Gorjiara, M. Reshadi, M. Fakhraie, "GeReDiF: Using XML as a Structured Data Format in Grid Applications", IEEE International Symposium on Cluster Computing and the Grid (CCGrid), May 2001. (poster-pdf) (pdf)
M. Reshadi, B. Gorjiara, Z. Navabi, "Portability and Security, All in CHIRE File System", Hardware Description Languages Conference (HDLCon), February 2001. (pdf)
M. Reshadi, B. Gorjiara, Z. Navabi, "HDML: Compiled VHDL in XML", VHDL International Users Forum (VIUF), pages 69-74, October 2000. (pdf) (ieee) (acm)
B. Gorjiara, M. Reshadi, D. Gajski, "NISC Communication Interface", CECS, TR 06-05, March 2006. (pdf)
M. Reshadi, B. Gorjiara, D. Gajski, "NISC Technology and Preliminary Results", CECS, TR 05-11, August 2005. (pdf)
B. Gorjiara, N. Bagherzadeh, "Systematic Power Management of Heterogeneous Real-time Systems by Dynamic Schedule Analysis", CECS, TR 04-26, August 2004. (pdf)
B. Gorjiara, F. Kuester, P. Chou, M. Reshadi, "GX-GUI: A General Extensible Technique for 2-D Interaction with VR Applications", CECS, TR 03-46, January 2003. (pdf)
B. Gorjiara, P. Chou, N. Bagherzadeh, "An Algorithm to Avoid Power Command Jitter in Middleware-Based Distributed Embedded Systems", CECS, TR 03-47, July 2003. (pdf)
B. Gorjiara, "Synthesis and Optimization of Low-Power Custom NISC Processors", Ph.D. Dissertation, Department of Electrical Engineering and Computer Science, University of California, Irvine, December 2007. (pdf)
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