DCT implementation using No-Instruction-Set Computer (NISC)
Verilog files, design constraints and Xilinx project files with proper settings for the DCT implementations can be downloaded from here. To download each implementation separately, see the following table.
| Architecture | Block diagram | Description | Download |
| NMIPS |  |
NISC architecture with MIPS datapath | download |
| CDCT1 |  |
Custom datapath | download |
| CDCT2 |  |
Custom datapath with optimized buses | download |
| CDCT3 |  |
Custom datapath with simplified ALU, Comparator and RF | download |
| CDCT4 |  |
CDCT3 + CW resigter | download |
| CDCT5 |  |
CDCT4 + status register | download |
| CDCT6 |  |
CDCT5 with 8-bit address calculation stage | download |
| CDCT7 |  |
CDCT6 with multi-cycle multiplier | download |